I am using the reference design DAQ2 (2016_R2/no-os) with SoC ZC706. Everything is working fine. However the transmit data size is limited by the FIFO address size and I would like to generate a 10ms frame @491.52Msps which is way too much data for FIFO.
Do you know an easy trick to transfert that amount of data at that rate from your design?
Should I just bypass the FIFO?
Thank you for your help.