rrosario

AD5767 Spice Macromodel

Discussion created by rrosario Employee on Jan 15, 2018

The following is a brief description of the AD5767 Spice Macromodel.

 

The Spice netlist can be downloaded from the AD5767 product page:

http://www.analog.com/en/products/digital-to-analog-converters/precision-dac/bipolar-da-converters/ad5767.html#product-overview

 

The Symbol can be downloaded as an attachment at the bottom of this page.

 

Model Features:

  • DAC Buffer: The DAC buffer models the GAIN, BW, settling time & slew rate of the buffer across the different voltage ranges of the AD5767.
  • DAC Non-Linearity Block: This block models all the DAC non-linearities and DC errors of the AD5767 which include Zero-scale error, Offset error, Bipolar Zero error, INL, DNL and Gain error across the different voltage ranges.
  • Noise Block: This block models the output noise density across different voltage ranges.
  • PSRR Block: Models the power supply rejection of the AD5767
  • Current Limit Block: Models the maximum current (60mA) supported by the AD5767.
  • Dither Block: Models the dither functionality of the AD5767. Providing a sinusoid to pin N0 gives a DC shift of 0.63LSB at the output and the sinusoid will also be added to the output. The dither signal connected to the N0 pin should have a maximum pk-pk voltage of 250mV. Connect N0 to ground if dither function is not used. The figure below shows the simulation result of the output when a set to -20V and a 250mVpk-pk dither signal is connected to the N0 pin.

Figure 1. 250mVpk-pk dither signal superimposed to the output.

 

AD5767 Features not modelled:

The AD5767 Spice Macromodel only models the output analog stage of the DAC. The list below shows the function and features of the AD5767 which are not included. 

  • Digital Block and Serial interface (VLOGIC/SDI/SCLK/SYNC/SDO/RESET)
  • Channel monitoring multiplexer
  • 15 of 16 channels are not modelled
  • N1 (second dither signal)
  • Reference input
  • Temperature dependencies and leakage currents

 

TOP LEVEL PARAMETERS

Sl. No.

Parameter Name

Purpose

Description & Default Value

1

slewrate

To enter the slew value of the buffer (in V/us)

Enter the value in Volts (for a slewrate of 1V/us, enter 1)

2

range

To select the output range of buffer

Can have any integer value from 0 to 7 (refer above list)

3

en_bip

Enable bipolar zero error

Set 1 for ON, 0 for OFF

4

bip_sign

Select sign of bipolar error

Set 1 for +ve, -1 for –ve error

5

en_gain_error

Enable gain error

Set 1 for ON, 0 for OFF

6

en_offset

Enable offset error

Set 1 for ON, 0 for OFF

7

offset_sign

Select sign of offset error

Set 1 for +ve, -1 for –ve error

8

en_inl

Enable INL error

Set 1 for ON, 0 for OFF

Note: Top level parameters need to be set on the test circuit to match actual performance of the device.

slewrate: set this parameter to “1” to match the 1v/us output slew rate of the device

range: set this parameter according to the supplies used on the test circuit. Supply voltages setting on AVDD and AVSS needs to be set to maximum output range +2V and minimum output range-2V respectively.

The following nomenclature is used for specifying the corresponding voltage range:

Range 0: Buffer output range: -20V to 0V

Range 1: Buffer output range: -16V to 0V

Range 2: Buffer output range: -10V to 0V

Range 3: Buffer output range: -12V to 14V

Range 4: Buffer output range: -16V to 10V

Range 5: Buffer output range: -10V to 6V

Range 6: Buffer output range: -5V to 5V

Range 7: Buffer output range: -10V to 10V

en_bip: set this parameter to “1” to enable the bipolar zero error when output range selected is bipolar.

bip_sign: set this parameter to select the polarity of the bipoplar zero error when output range selected is bipolar. A “1” sets the polarity to positive (+) and a “-1” sets the polarity to negative (-).

en_gain_error: set this parameter to “1” to enable gain error.

en_offset: set this parameter to “1” to enable the offset error.

offset_sign: set this parameter to select the polarity of the bipoplar zero error when output range selected is bipolar. A “1” sets the polarity to positive (+) and a “-1” sets the polarity to negative (-).

en_inl: set this parameter to “1” to enable the INL error.

 

HOW TO IMPORT THE MODEL IN LTSPICE:

  1. Create a symbol in LTSPICE or download the symbol at the bottom of the page. The symbol should have the VIN, N0, VOUT, AVDD, AVSS & GND pins.
  2. Load the AD5767.cir file by pressing “CTRL+A” and copy the file location Symbol Attribute Editor then press “OK”.
  3. The model can now be used on the sample test circuit. Make sure to set the top level parameters to the correct settings

      

 

SAMPLE SIMULATION RESULTS:

  • SettlingTime

  • Full Scale Step

  • Dither

 

Note: See attachment for sample test circuits.

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