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Unable to lock at frequencies like ~<120MHz with digital lock detect

Question asked by cp4an on Jan 15, 2018

Dear Ladies and Gentlemen,

 

I use the ADF5355 as wideband fracn synthesizer for its whole frequency range. Unfortunately it is not able to get a stable digital lock detect high for frequencies <~115MHz with divided Feedback e.G. 112.00125 MHz.
Using the same setting as fundamental feedback with the same Frequency e.G. 112.00125 MHz (fref=16.384 MHz, fpfd=1.024 MHz) works fine. So I exclude the Loopfilter as source of this lock fail. The loop filter has been created with ADISimPLL. The Registersettings have been checked with ADF4355/ADF5355 Evaluation Board Control Software.
I tried a lot of changes (single/multi value):
* bleed on/off
* change of bleed current
* change of lock detect precision (ld2/3)
* change of lock detect cycle count (ld4/5)
* change to analog lock detect (the pll is locked:slightly tuning of the reference leads to proportional tuning of the VCO frequency, but Muxout only gives low signal)
* Timout variation (ALC, SL, Timeout)
* change of VCO Band division Register
* Feedback: divided/fundamental
* change of reference Source and -frequency with slighly different pfd frequency
* slighly change of pfd frequency
* change of loopfilter seems not neccessary to me because the pll is locked and  gives a pure signal with analog lock detect (no high spurs/low phasenoise)
* change of signal frequency: (112.00125: digital lock detect didn't work but 224.0025 MHz does: VCO Frequency is the same, measured with SA) -> loop Filter should work at 112.xx MHz too.
* check SPI communication to avoid

 

The application needs
* a stable lock detect signal.
* divided feedback
* mute till lock detect (digital lock detect)
* optional phase adjust application

 

Capacitors at VBIAS are only 10p+100n as suggested in [FAQ:proper amount of bypassing on the VBIAS pin?].
In [FAQ:Question: Unable to lock at very low frequencies (<330MHz)] are described similar Problems to my application but no suggested solution leads to success.

 

My Questions:
1) Why lock detect fails with digital lock detect and don't with analog lock detect selected?
2) Why analog lock detect signal on Muxout stays low even if lock seems to be achieved?
3) What do you suggest to do to meet the application needs written above?

 

References:
[FAQ]    Analog Devices: "FAQ: The Ultimate Guide to the ADF5355 Microwave Wideband Synthesizer", https://ez.analog.com/docs/DOC-16765

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