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ADE9000 SPI problem

Question asked by ghsung on Jan 15, 2018
Latest reply on Jan 15, 2018 by Gary.Kang.AnalogDevices

Hi, I'm using ADE9000.

 

I connected 2 ADE9000 devices to the master board to measure how much gap of the current, voltage, power value between ADE9000s.

 

The main idea is like that:

[First Test : Test with 1 ADE9000]

   TX of master board <-> MOSI pin of ADE9000.

   RX of master board <-> MISO pin of ADE9000.

   CLK of master board <-> CLK pin of ADE9000.

   CS0(or CS1) of master board <-> CS pin of ADE9000.

   GND of mater board <-> GND, PM0, PM1

   3.3V of master board <-> nRST pin of ADE9000.

   5V of master board <-> VBUS pin of ADE9000.

[Second Test : Test with 2 ADE9000s.]

   TX of master board <-> MOSI pin of 2 ADE9000s.

   RX of master board <-> MISO pin of 2 ADE9000s.

   CLK of master board <-> CLK pin of 2 ADE9000s.

   CS0 of master board <-> CS pin of 1 ADE9000s.

   CS1 of master board <-> CS pin of the other 1 ADE9000s.

   GND of mater board <-> GND, PM0, PM1

   3.3V of master board <-> nRST pin of 2 ADE9000s.

   5V of master board <-> VBUS pin of 2 ADE9000s.

 

My code actually succeeded in 1st test, but 2nd test seemed like not working(Please check the files below).

 

Could you give me a hand how to solve this problem?

Did I miss something or shouldn't I test like this?

 

regards,

ghsung

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