Question asked by dbakker on Jan 14, 2018
Latest reply on Feb 12, 2018 by dbakker
for my thesis work I have built a TIA based on the AD8655. It is a quite standard TIA, with a transimpedance gain of 1M and a bandwidth of 100kHz. For this application the noise of the complete circuit is critical, so I designed and simulated this circuit (and the subsequent voltage amplification and filter stages) in SPICE, with an additional check on these results using the standard TIA noise equations.
the power supply for this circuit consists of a supply line of 5V from a low noise LDO and a reference voltage (to create a reverse bias) of 4V generated by a voltage divider with 100uF.
The noise figure of my prototype however does not behave as expected. The noise voltage as simulated by ADIsimPE looks as follows (note that this graph is linear in frequency for ease of comparison with the signal analyzer graphs)
The noise voltage at the output of the TIA looks as follows:
note that the signal analyzer I used is quite low-end, this is the noise floor of this analyzer:
In conclusion, at low frequencies the output noise of the TIA is below the noise floor of the signal analyzer so no comparison is possible here, but instead of decreasing after about 200kHz, the output noise keeps increasing and shows a sharp and strong peak around 400kHz.
To find the cause of this noise peak, I tried a few adjustments to my prototype to investigate the effect on the output noise. for starters, this is the physical setup:
the TIA stage is encased in a shield. The photodiode is placed on the other side of the PCB, encased within a shield as well with a hole drilled out for optical reasons. I tried the following adjustments:
- increasing the input capacitance: with an additional 20p at the input the noise around 100kHz is slightly higher and the noise at higher frequencies is slightly lower, I expect due to a shift in the Fc of the TIA. The shape of the peak at 400kHz however does not change
- decreasing the input capacitance: I removed the photodiode and the shielding to minimize capacitance at the input node and other parasitic capacitances. The resulting noise is negligibly different from the noise graph given above.
- minimizing TIA output load: with subsequent stages disconnect, again nothing changes on the measured output noise
- checking a different channel: this design contains multiple separate channels. The noise figure of this channel shows the same noise peak, but at a different frequency:
At this moment I am at a loss for what effect could cause this noise. Its frequency is well outside the TIA passband and has a weird, triangular shape. It's peak frequency appears to differ between different AD8655 ICs, but it is unclear to me which specific effect is causing this noise. Is there some effect that is particular to the AD8655 that I am unaware of, or is there something else that I am overlooking?