The ADL7003 shows there is no DC voltage for the capacitors connected to the B power and gate voltage pins, is this correct?
Your observation is correct. The data sheet's Typical Application Circuit shows capacitive bypassing for both the "A" and "B" DC bias pads, but it shows DC bias being applied only to the A DC bias pads. The Typical Application Circuit mentions that "...drain and gate voltages can be applied to either the north or the south side of the circuit." North is the A side. South is the B side. DC bias for the A and B sides of the chip are connected together on-chip. When we validated the part we applied DC bias from the A side, so we chose to use that particular configuration for the Typical Application Circuit. Since the layout of the part contains near total symmetry, you could choose to apply DC bias from the B side, rather than from the A side.
I moved your question here in RF and Microwave community. SMcBride would be able to help you.
Thank you for the answer, we were on a day off yesterday. I have one more question before I commit this design to fabrication. The example on page 17 shows only the non-ground pins bounded out to pads. Do we need to wire bond the ground pads also or do they just get their ground through the backside?
Again thanks for the info, Dave J.
The only ADL7003 pads requiring connection are shown on the Typical Application Circuit and the Assembly Diagram. The die does have several ground pads, some of which are used during our wafer probe/production test, but none of those ground pads require connection in a customer application. The die fabrication process includes vias which bring the circuit grounds to the backside metal. In your application, that backside metal will serve as the only ground for the die. For best performance you should ensure that the external bypass capacitors make a good, low inductance connection to the ground substrate onto which the backside is attached.
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