I have been using ADC ADAR7251 from analog devices in my FMCW radar setup, I have issues with configuration and functioning of the ADC. When I configure the ADC in the Serial master mode such that the ADC frame clock and bit clock both are generated from the adc, then I sampling works and I receive the adc output data correctly.
However when I use the ADC in serial slave mode, that is the frame and bit clock signals are from the FPGA. then the ADC sampling does not work and the adc output data is just noise.
Can anyone help in this regard and give some tips or suggestions for why the same ADC is not working in the slave mode, however it works fine in master mode.
P.S the design is custom and I do not have evaluation board of the ADAR7251