I have ad9361 ip core, i am taking the data from processor. then i converted into HDLC serial data. now please tell me how can i use AD9361 HDL ip core to send this data to FMCOMM2 which is interfaced with AD9361 Hardware.
1) should i need to convert into bipolar form Inside FPGA?.
2) Should i need to convert it into 6 bit for LVDS and 12 bit for CMOS, or can i directly converted into 12 bit then fragment into two stream.
Thanks & Regards