I am using an ADS7-V2EBZ and DPG Downloader to provide 12-bit patterns. I also have a test setup using the ZCU102 Zynq Ultrascale+. In both cases, the JESD link is up and running and I can see data being transmitted via Xilinx ILA debugger, but I detect no signal on either TX0 or TX1 outputs besides a spike at the sampling frequency.
Is there any documentation on this?? I have verified the functionality of multiple 16-bit modes but cannot get a 12-bit mode to work, not even using exclusively AD dev. boards and tools. The datasheet says nothing of 12-bit mode configuration save for JESD link parameters, which I have ensured are correct.