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DAQ2 AD9523-1 pll2 feedback lock issue

Question asked by JerryX on Jan 4, 2018
Latest reply on Jan 5, 2018 by JerryX


      i am testing DAQ2+KCU105 now,  when i finished the configuration of AD9523-1(my own fpga code), the readback value of 0x22c is a2.  i found bit7-Status PLL2 feedback clock is zero. Is this Normal? Also i try to use the microblaze image provided by ADI from link[]=daq2&s[]=microblaze  .  The value of 0x22c is also a2

PS: i only use pll2 of AD9523-1, so i bypass pll1 that means i did not do any configuration to any pll1 registers.


Below is register value and configuration sequence:


AD9523_READBACK_CTRL          //0x04   0x01
AD9523_io_update()           //0x234  0x01

--  AD9523_PLL2_CHARGE_PUMP,               //0xF0 --  0x76   
--  AD9523_PLL2_FEEDBACK_DIVIDER_AB  //0xF1 --  0x06
--  AD9523_PLL2_CTRL                                   //0xF2 --  0x13
--  AD9523_PLL2_VCO_DIVIDER    //0xF4 --  0x40   
--  AD9523_PLL2_R2_DIVIDER           //0xF7 --  0x01  
--  AD9523_PLL2_LOOP_FILTER_CTRL      //0xF6 --  0x00   
--  ADC converter clock  out13          //0x1B7 -- 0x01    0x1B8 -- 0x00   0x1B9 -- 0x04
--  ADC converter clock  out4           //0x19C -- 0x01 0x19D -- 0x01   0x19E -- 0x04
--  ADC converter clock  OUT5           //0x19F -- 0x01    0x1A0 -- 0x7f   0x1A1 -- 0x04
--  ADC converter clock  OUT6           //0x1A2 -- 0x01 0x1A3 -- 0x7f   0x1A4 -- 0x04
--  DAC converter clock  OUT9           //0x1AB -- 0x01 0x1AC -- 0x01   0x1AD -- 0x04

--  AD9523_POWER_DOWN_CTRL              //0x233  0x00
--  AD9523_PLL2_VCO_CTRL        //0xF3   0x00
--  ad9523_io_update()           //0x234  0x01
--  AD9523_PLL2_VCO_CTRL        //0xF3   0x02
--  ad9523_io_update()           //0x234  0x01