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[AD9361 REFERENCE DESIGN] Insert processing module and freeze the chain upstream 

Question asked by joaoamaral on Jan 2, 2018
Latest reply on Jan 16, 2018 by joaoamaral

Hi everyone,



I am trying to insert an LTE FFT processing module between the Unpack and FIFO cores in the reference design for AD9361. This processing module requires that the UNPACK block to stop sending data (and stop requesting data from the DMAC) in order to insert the cyclic prefix in the frames. When the core is not ready to accept data from the UPACK block, it has a flag bit that goes low. 




Is it possible to use this flag to signal UPACK to stop sending data and forward it to the FIFO interface in the DMAC so that there is no data loss nor data processed multiple times?