We are using AD9361 along with Zynq ZC702.Our receiver is running slowly.
We want to reduce the rate at which adc samples from ad9361 come .
We are trying to reduce sampling frequency.Is it the correct way to do?
We are not able to bring it less than 4MHz.When we keep it as #MHz
it is restoring to some default value around 37MHz .
Is it possible to reduce the sample freq < 4MHz.Is there any other way
or any function i can change so that adc operates slowly without loss of data.
We are using 2RX2TX mode so adc valid is high only once in 4 clk cycles.