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Reduce sampling frequency in AD9361 or reduce speed of adc

Question asked by Manas@98 on Jan 1, 2018
Latest reply on Jan 1, 2018 by Vinod

We are using AD9361 along with Zynq ZC702.Our receiver is running slowly.

We want to reduce the rate at which adc samples from ad9361 come .

We are trying to reduce sampling frequency.Is it the correct way to do?

ad9361_set_rx_sampling_freq(ad9361_phy, 4000000);

We are not able to bring it less than 4MHz.When we keep it as #MHz

it is restoring to some default value around 37MHz .


Is it possible to reduce the sample freq < 4MHz.Is there any other way

or any function i can change so that adc operates slowly without loss of data.


We are using 2RX2TX mode so adc valid is high only once in 4 clk cycles.