I am designing a circuit using EVAL-HMC7044 and AD9625.
I have an inquiry about HMC7044.
On the EVAL-HMC7044, 122.88MHz clock is input to pin 48(#OSCIN).
- I want to output the desired clock, but what about the formula for the PLL1 or PLL2 setting?
(122.88 * (N2/R2)) / DIVIDER = CLKOUTx(????)
N2 : Reg. 0x0035/0x0036
R2 : Reg. 0x0033/0x0034
DIVIDER : Reg. 0x00C9/0x00CA
I think it's right...
For example, please explain.