I use AD9361 board on warp virtex6 FPGA and design a pure sin wave to AD9361 Tx1 in hardware and write NO-OS driver code make it work. By operating spectrum analyzer to observe the output of the AD9361 Tx1 as a contour sine wave as **Figure1**. I confirm that the output of Tx1 is correct and it is what I want.

I make one ad9361 Tx1 connect to Rx1(one ad9361 board).Do the same thing which is mentioned in the first paragraph,and you can see that the waveform of Rx1 on chipscope in **Figure 4** is the same as **Figure 1**.

However, I make A ad9361 Tx1 connect to B ad9361 Rx1(two board cross-board connection) and do the same. I find that the waveform of B ad9361 Rx1 on chipscope distorts as **Figure 2** and **Figure 3** (Figure 2 is in 2.4G synthesis frequency.Figure 3 is in 1G synthesis frequency.).There are different distorted level in different synthesis frequency.

I wonder know that **how to figure out the distortion on cross-board connection through modify driver code? **Or **do you have any simple test about **cross-board connection , and I can observe the undistorted wave precisely.

Thanks.

Hi,

The effect that you are seeing is a result of incomplete re-construction of the signal.

You have a continuous time analog signal that is defined at all points. This signal is sampled by an ADC and transformed in a discrete time signal. A discrete time signal is only defined for certain points in time. Those points are spaced by the period of your sampling clock. The signal is not defined defined between these points. To correctly recover the value of the original continuous time signal you have to do a sinc interpolation to compute the intermediate values.

In your case you are connecting the discrete sample points by drawing a straight line between them. This results in the effect your are seeing. Connecting the sample points with a straight line results in a first-order linear interpolation, but to correctly re-construct a band-limited sinusoidal signal a sinc interpolation is required.

The reason why the amplitude appears to be going up and down is because sometimes the signal is sampled at the crest, sometimes slightly before it, sometimes after it. E.g. take a look at the following images.

The first row represents the continuous time signal, the red dots represent the sampling points of the discrete signal. In the second row the discrete sampling points have been connected by drawing a straight line between them. As you can see this creates a inaccurate re-construction of the original signal. Be aware that this is just a shortcoming of the way of drawing the signal (or the re-construction method), not the signal itself. The discrete signal itself still contains all the same information as the continuous time signal (within the configured bandwidth).

Now lets zoom out.

You can see that the continuous time signal has a flat envelope whereas for the discrete time signal where the points have been connected by a straight line the envelope goes up and down.

If you want to get a accurate representation of the amplitude of the signal for each discrete point calculate the complex magnitude of the signal sqrt(I**2 + Q**2). This should result in a flat line as long as the input power stays the same.

Lets look at a real world example.

For this example the AD9361 was setup with a sampling rate of 30.72 MSPS, while the DDS was setup to produce a tone of 7.679648 MHz. This DDS frequency is very close to 7.68 which is 1/4 of the sampling rate. The closer your tone is to a integer division of the sampling rate the more profound this aliasing effect gets. As you can see in the picture the value of the I and Q components seems to go up and down by quite a bit. But if we plot the complex magnitude sqrt(I**2+Q**2) (in blue) it is flat showing that the signal has constant amplitude.

- Lars