Hi! I use ADF4002 in microwave PLL low noise sythesizer. Using low noise downconverter i want to achieve -135 dBc/Hz phase noise at 100 kHz offset. Input frequency 4760 MHz divided by two converted down to 18 MHz and fed to ADF4002 RF Input. Residual noise floor of downconverter is -144 dBc/Hz. At Ref input there is a 18 MHz signal generated by AD9912. PFD frequency is 18 MHz. RF input power is -3 dBm. Ref input power is +4...+10 dBm. Calculated phase noise of ADF4002 is lower than -140 dBc/Hz and i must see phase noise of offset microwave signal -135 dBc/Hz. But i can't see them. Phase noise is only -130 dBc/Hz. Here is calculated phase noise of output signal. What's a problem? I would use some components in ADF4002 Eval Board schematic not shown. Or there is a problem caused by downconverter noise floor and i can't achieve lower noise in this architecture.