AnsweredAssumed Answered

ADV7842 CP, SDP pull in pull out range issue

Question asked by Fermat on Dec 15, 2017
Latest reply on Dec 19, 2017 by JeyasudhaMuthuPerumal

Hi all,


I meet a serious issue for ADV7842 for pull in / pull out the input signal for our product request.

For ADV7842 CP and SDP DE output, if we adjust the input frequency, the ADV7842 output will error.


I use the EVA board:


Input: 1080 60I

Component input.




When I fine tune the input V Line, after +4, the even/odd error. Please see attachment picture.

If the +more line, it seems only even/odd shift.


[Correct Pic]


[Add V line, with ShibaSoku Signal Generator]


[Even/odd NG]


[Evne/odd NG more]




(For EVA board, if I use HDMI input, it's still OK after I add 2X lines).


I want to know how to set ADV7842 CP and SDP so that output correct output for input frequency with pull in pull out range.