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FDD Independent Mode flush

Question asked by PFL on Dec 13, 2017
Latest reply on Dec 14, 2017 by sripad


When using the AD9361 in FDD Independent mode, is it necessary to present zeros on the Tx data bus with an asserted TX_FRAME prior to transmitting the first symbol, or is flushing achieved by holding TX_FRAME low.  I've read seemingly conflicting advice here. Also, am I correct in thinking that the chosen flushing method should be applied for a minimum of 384 clock cycles?