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what is the state of the ADuCM361 DAC output while in low power mode 4 or 5? Is it tri-stated? It seems when the Jlink debugger is attached it remains driven to the correct level but on it's own it appears tri-stated. is there any documentation on this?

Question asked by dcfee3 on Dec 11, 2017
Latest reply on Dec 20, 2017 by barryzhang

What is the state od the ADuCM361 DAC while in low power modes 4 or 5? Is it tri-stated? It appears to be driven to the last level sent to it when the J-link debugger is attached, but floating or tri-stated when running on its own. is there any documentation on the DAC outputs under low power conditions?

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