Sometimes locking is released when changing the PLL frequency.
Reference frequency: 10 MHz
Fout Tx setting：5.757、5,7GHz Rx setting：5,144、5.104GHz
Loop Filter was designed with ADISimPLL.
Conditions for occurrence of defect symptoms
Appears at frequency down from 5.757 to 5.7 GHz at Tx frequency switching time. It also appeared in Rx.
Appears at 15~20 °C (using A constant temperature bath)
A problem was confirmed with 2/2 set and Eva-board.
Frequency of appearance is 1/200
Improve by changing the condition of ADCCLK.
Attachment: Spectrum analyzer waveform Lock / unlock
I want to know that Detailed function of the ADC in the PLL.
Especially how does it feed back to Vtune voltage?
Also, Why lock-out occurs?