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Vivado synthesis fails with no errora

Question asked by mshin on Dec 10, 2017
Latest reply on Jan 7, 2018 by mshin

Hi,
I want to synthesize the raw project of ad9361 driver vivado 2016.2.  The problem is that its synthesis becomes failed without any errors while there is no problem when synthesizing it in vivado 2016.3 But needs upgrading ips (is it simple or suggested??).
I have read the solutions mentioned in the internet which there was a similar problem. But they didn't help. I should also say that in other pc the project works fine.

 


This is my pc:
Cpu: ci7 7700k 
Motherboard: asus prime z270 
Ram:16g
Storage:ssd
Win10

 

This is the link of the ad9361 project and I have run the fmccomms2/kc705 project

 

https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/reference_hdl


Any suggestion?

 

Thanks

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