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How to properly adjust HSYNC/VSYNC generation for ADV7511

Question asked by bberical on Dec 7, 2017
Latest reply on Dec 22, 2017 by MikeOC

Hello -


  I'm trying to interface a visual camera to the ADV7511, so that I can stream real video to a display, but I'm having understanding just how to set the HSYNC/VSYNC registers (page 58 of the ADV7511 programming guide).


  ADV7511 is currently configured for 16-bit YCbCr 4:2:2 with embedded syncs, and works successfully with a reference design test pattern.


  The camera itself is 480p60, using CameraLink, and I'm converting the signal timing for compatibility with the color space conversion and existing FPGA interface to the ADV7511. I think I'm getting hung-up on the settings for the registers at address 0x30-0x34.


  I'm even having a hard time correlating the register settings to the reference design (HSYNC/VSYNC placement, duration, etc). But the reference design works. I've seen several canned examples (essentially Table 35 in the programming guide) but none of them are working for me, when interfacing the camera. Do these register settings need to be 100% accurate (not even off by a pixel) or is there some margin on their settings, vs the embedded syncs?