The HMC8205 eval pcb board is a 0.010 ROGERS 4350B 2 layer.
For my application I need more layers, prefer 6 layers. I consider following stackup:
Layer 1-2: Rogers 4350B 0.010 (as eval board)
Layer 2-6 FR4
Layer 1: RF layer
Layer 2: gnd layer
Layer 3: power layer
Layer 4: signal layer
Layer 5: signal layer
Layer 6: gnd (layer toward heat sink) Soldermask relief
Total height 0.042" same as Flange height of the HMC8205 chip.
My concern is the jump in gnd, as HMC8205 has heatsink as gnd reference, and the RF trace has layer 2 as gnd layer. (RF trace routed in layer 1). There will be added lot of gnd via to have a commen potential of gnd layers in the board. .
Do Aanalog Device have any experience/comments on my concern?