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ADAU1452: Is a clock with 1% duty cycle allowed as input clock?

Question asked by takumi3952 on Dec 4, 2017
Latest reply on Dec 7, 2017 by DaveThib


I input 750Hz pulse (Hi Duty = 1%) signal from External Device to ADAU1452.
I configured ClockGenerator3 but LRCLK and BCLK didn't output expected signal.

Outputted clock stops sporadically.

Does this input clock violate device constraints?

Thanks and Regards,