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AD9508 as a LVDS clock distributer

Question asked by xzsawq21 on Nov 29, 2017
Latest reply on Mar 25, 2018 by xzsawq21


I need an urgently answer

I have a FPGA and a DAC.


The FPGA has its clock and is working normally and it will send a command to activate the below XO.


(low jitter LVDS XO)---> AD9508---> DAC


if I want to send the digital data to the DAC, I need a clock feedback from above clock generator. how should I sync the DAC with the FPGA? I mean if want to have a feedback clock, there is delay.

(I read the AD9805's datasheet but I'm puzzled with the SYNQ pin and other pins...)

could you please help me?


Best Regards