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ADV7611 HDMI drive strength question

Question asked by APZ Employee on Nov 22, 2017
Latest reply on Nov 24, 2017 by GuenterL



We are using two of the ADV7611 HDMI receivers on one board which are failing EMI due to the pixel clock harmonics. They are running 2x 1080P video inputs / outputs.


For 1080P, the LLC (pixel clock) is set to 148.5 MHz, so DR_STR_CLK should be set to 4x.


Question: Does the Data and sync drive strength need to be set for 4x as well?