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Clock enabling for ADAU1761 in Linux kernel

Question asked by perdo on Nov 20, 2017
Latest reply on Nov 22, 2017 by DaveThib

Hi,

I use ADAU1761 in a system running the 4.9 Linux kernel. When I bypass the DSP (AIFIN), everything works fine, but when I enable the DSP, I have trouble with some register settings. I noticed that SINPD (Serial routing inputs digital clock engine enable) and SPPD (Serial port digital clock engine enable) in register 0x40F9 (Clock Enable 0) and  CLK1 (BCLK and LRCLK) in register 0x40FA (Clock Enable 1) were never set in the DSP case. If I make the changes below to sound/soc/codecs/adau1761.c my system works fine. And now my questions:

 

1. Do the changes make sense, is there a better way to correct the problem?

2. Do other people experience the same issue or am I using the system in an odd or incorrect way? There are obviously other projects out there using the ADAU1761 in Linux.

 

diff --git a/sound/soc/codecs/adau1761.c b/sound/soc/codecs/adau1761.c
index 2fca072..b93865d 100644
--- a/sound/soc/codecs/adau1761.c
+++ b/sound/soc/codecs/adau1761.c
@@ -435,6 +435,9 @@ static const struct snd_soc_dapm_route adau1761_dapm_routes[] = {
{ "Right DAC", NULL, "Interpolator Resync Clock" },

{ "DSP", NULL, "Digital Clock 0" },
+ { "DSP", NULL, "Digital Clock 1" },
+ { "DSP", NULL, "Serial Port Clock" },
+ { "DSP", NULL, "Serial Input Routing Clock" },

{ "Slew Clock", NULL, "Digital Clock 0" },
{ "Right Playback Mixer", NULL, "Slew Clock" },
--
2.1.4

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