I would like to set following frequencies on my sc584 board:
- CLKIN = 25 MHz
- ARM CLK = 450 MHz (max allowed) (also x2 SHARC)
- DDR2 = 400 MHz (max supported)
- RGMII/GbitE CLK = 125 MHz
- Linkport = 150MHz.
Is it possible to have those maximal frequencies set with two CGUs?
The closest match seems to be DCLK set o 375 MHz, ARM CLK to 450 and RGMII/GbitE CLK = 125 MHz.
In the above
- GCU0 -> 450 MHz (as it is with cces 1.2.0 init program)
- CGU1 -> 750 MHz (the PLL max f is 900MHz) ->
750 / 6 = 125 MHz
750 / 2 = 375 MHz (DCLK).
I'm also curious why for DDR2 the clock of 225 MHz was used, instead of e.g. 200, 266 MHz? Is using not "graded" frequency safe?