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FMCADC2 board with VC707

Question asked by rlaghlfh on Nov 20, 2017
Latest reply on Nov 21, 2017 by CsomI

Hi, I have a VC707 and an FMCADC2 board which contains AD9625.

I downloaded HDL files from hdl/projects/fmcadc2/vc707 at master · analogdevicesinc/hdl · GitHub 

I also downloaded 2016_r2 branch files and installed Vivado 2016.2

 

When I type make -C projects/fmcadc2/vc707

my cygwin says 

vivado -mode batch -source system_project.tcl >> fmcadc2_vc707_vivado.log 2>&1

make: *** [Makefile:65: fmcadc2_vc707.sdk/system_top.hdf] error 1

 

and the log file says (after phase 11 Post Router Timing)

 

 

open_run: Time (s): cpu = 00:01:20 ; elapsed = 00:01:16 . Memory (MB): peak = 3081.531 ; gain = 688.094 
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -2, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 2 CPUs
report_timing_summary: Time (s): cpu = 00:01:01 ; elapsed = 00:00:36 . Memory (MB): peak = 3258.352 ; gain = 176.820
error copying "fmcadc2_vc707.runs/impl_1/system_top.sysdef": no such file or directory    
while executing
"file copy -force $project_name.runs/impl_1/system_top.sysdef $project_name.sdk/system_top.hdf"    
invoked from within
"if [expr [get_property SLACK [get_timing_paths]] < 0] {    
file copy -force $project_name.runs/impl_1/system_top.sysdef $project_name.sdk/system_top_..."    
(procedure "adi_project_run" line 26)     invoked from within "adi_project_run fmcadc2_vc707"    
(file "system_project.tcl" line 19)
INFO: [Common 17-206] Exiting Vivado at Mon Nov 20 05:45:56 2017...

I don't know how to fix this error...

Thanks in advance.

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