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ADAU1442 S/PDIF breaks between two boards

Question asked by WattsAUD on Nov 19, 2017
Latest reply on Nov 30, 2017 by WattsAUD

We are experiencing strange S/PDIF lock issues with a custom ADAU1442-based board, but only when connecting S/PDIF I/O between two of these boards. A brief summary:


S/PDIF from 3rd party source (e.g. soundcard): OK
S/PDIF from DUT to 3rd party receiver (e.g. DAC): OK
S/PDIF between two DUT's: intermittent audio dropouts
S/PDIF loopback between TX and RX on the same DUT: OK
S/PDIF from DUT to EVAL-ADAU1442: OK


The breaks are sporadic and of the same length. If ASRC's are disabled on the DSP input they are much shorter as expected, but still audible. They are often clustered together as a series of quick successive breaks. Cold boards also tend to have less breaks than ones that have been running for a while (power-cycle makes no difference so it does relate to heat, not running period).


The DSP program used for testing is made as basic as possible using all default registers and only configuring the bare minimum of a tone generator to S/PDIF TX in the transmitter and ASRC to analog out in the receiver board. Sample rate is fixed to 48kHz.


The board itself is good: 6 layer with continuous GND, VCCIO & VCORE planes, extensive close decoupling. PLL components as per datasheet, proper attention to routing. Differences to the EVM are that the master clock is a 12.288MHz oscillator via a 74LCX125 buffer, and power supplies for both IOVDD and DVDD use switching regulators that are shared with other board peripherals. PSU ripple and noise are measured to be low.


When used with other S/PDIF and I2S/TDM inputs and outputs we easily achieve proper measured audio performance and no breaks so it's hard to blame it on jitter or EMI. With 3rd party S/PDIF sources and loads it is also very difficult to break the audio such as deliberate impedance mismatch, extremely low signalling voltage levels etc.


The S/PDIF interfacing circuit uses transformers, RS422 receiver and line drivers with proper termination. It measures well on an oscilloscope, but the performance remained the same (no better or worse) on boards that were modified to bypass all the active electronics. An experiment with a direct 3.3V TTL connection between the two chips with only a series capacitor did not fare any better. The boards will be modified to experiment with optical connections but the evidence so far makes it fairly certain that the problem is not the medium.


Breaks have been confirmed to get worse during access to the core, such as a continuous register read. The I2C bus doesn't run close or underneath any of the sensitive electronics though. Once again, with 3rd party sources or sinks it's almost impossible to break the audio.


When using a tone generator in each board and monitoring the received audio on both boards, breaks are observed in both and uncorrelated to each other, although occasionally breaks are perfectly synchronized on both.


Another experiment where the two boards' DSP's were synchronized to the other by using the same MCLK for both yielded no improvement. A next experiment can be to use an external I2S-SPDIF transmitter or receiver, but as there are >1000boards in the field by the time this bug got discovered it would serve little purpose as it is too complex for a field/recall modification.

Any input would be appreciated.