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BF707 EPPI Receive mode with internal frame sync and external clock

Question asked by Aleksandr.Loiko on Nov 15, 2017

Hi,
I'm trying configurate EPPI in RX mode with internal frame sync and external clock. After configuration I see pixel clock from my camera using oscilloscope, but don't see any signal on VSYNC and HSYNC from EPPI. Is it possible at all to configurate EPPI in RX mode with internal frame sync and external clock? If yes, so can someone tell what is wrong in my configuration? There is my example code:

 if (adi_eppi_Open (0,
          ADI_EPPI_DIRECTION_RX,
          &(PpiDevMem[0]),
          ADI_EPPI_MEMORY_SIZE,
          &(hPpiDev)) != ADI_EPPI_SUCCESS)
{
    return false;
}

/* Pass a valid callback function to PPI driver */
if (adi_eppi_RegisterCallback (hPpiDev, GotFrameCallback, hPpiDev) != ADI_EPPI_SUCCESS)
{
   return false;
}

/* Set PPI DMA Transfer Size */
if (adi_eppi_SetDmaTransferSize (hPpiDev, ADI_EPPI_DMA_TRANSFER_256BIT) != ADI_EPPI_SUCCESS)
{
   return false;
}

/* Enable Streaming */
if (adi_eppi_StreamingEnable (hPpiDev, true) != ADI_EPPI_SUCCESS)
{
    return false;
}

/* Enable buffer repeat */
if (adi_eppi_RepetiveBufferEnable (hPpiDev, true) != ADI_EPPI_SUCCESS)
{
    return false;
}

/* Disable EPPI Error Reporting */
if (adi_eppi_SetInterruptMask (hPpiDev, ADI_EPPI_INTRMASK_ALL, true) != ADI_EPPI_SUCCESS)
{
   return false;
}

/* Submit a frame buffer to EPPI */
if (adi_eppi_SubmitFrame (hPpiDev,
    (void*)(&(EppiBuffer0[0])),
    /* XCount */ (uint32_t) 640,
    /* YCount */ (uint32_t) 480,
    /* XModify */ 32,
    /* YModify */ 32) != ADI_EPPI_SUCCESS)
{
    return false;
}

if (adi_eppi_SubmitFrame (hPpiDev,
    (void*)(&(EppiBuffer1[0])),
    /* XCount */ (uint32_t) 640,
    /* YCount */ (uint32_t) 480,
    /* XModify */ 32,
    /* YModify */ 32) != ADI_EPPI_SUCCESS)
{
    return false;
}

if (adi_eppi_SetControlReg(hPpiDev, ADI_EPPI_CONTROL_REGISTER, (ENUM_EPPI_CTL_NON656 |\
    ENUM_EPPI_CTL_SYNC2 |\
    ENUM_EPPI_CTL_FS1HI_FS2LO |\
    ENUM_EPPI_CTL_POLC11 |\
    ENUM_EPPI_CTL_PACK_EN |\
    ENUM_EPPI_CTL_SKIP |\
    ENUM_EPPI_CTL_SKIPEVEN |\
    ENUM_EPPI_CTL_DLEN08 |\
    ENUM_EPPI_CTL_INTFS) != ADI_EPPI_SUCCESS)
{
    return false;
}

/* Set Samples per Line */
if (adi_eppi_SetSamplesPerLine(hPpiDev, 1280) != ADI_EPPI_SUCCESS)
{
    return false;
}

/* # active data to receive after Horizontal Delay clock */
if (adi_eppi_SetHorizontalCount(hPpiDev, 1280) != ADI_EPPI_SUCCESS)
{
    return false;
}

/* Horizontal Delay clock after assertion of Hsync */
if (adi_eppi_SetHorizontalDelay(hPpiDev, 0) != ADI_EPPI_SUCCESS)
{
   return false;
}

/* # lines to read in after Vertical Delay number of lines */
if (adi_eppi_SetVerticalCount(hPpiDev, 480) != ADI_EPPI_SUCCESS)
{
   return false;
}

/* Vertical Delay after assertion of Vsync */
if (adi_eppi_SetVerticalDelay(hPpiDev, 0) != ADI_EPPI_SUCCESS)
{
   return false;
}

adi_eppi_SetFrameSync1(hPpiDev, 1280, 1280, 0); //HSYNC
adi_eppi_SetFrameSync2(hPpiDev, 1280*480, 1280*480, 0); //VSYNC

Regards, Alex.

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