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Cycles penalty in dual-data access

Question asked by Cedrikos on Nov 13, 2017
Latest reply on Jan 16, 2018 by Jithul_Janardhanan

Hi there.

 

Can somebody tell me why the following code takes 33 cycles instead of the expected 18 cycles?

 

"LCNTR = 3, DO (PC, 6) UNTIL LCE;\n\t"
" F12 = F3 * F4, F11 = F11 + F12, F3 = DM(I0, M0), F4 = PM(I8, M8);\n\t"
" F12 = F3 * F4, F11 = F11 + F12, F3 = DM(I0, M1), F4 = PM(I8, M8);\n\t"
" F12 = F3 * F4, F11 = F11 + F12, F3 = DM(I2, M2), F4 = PM(I9, M8);\n\t"
" F12 = F3 * F4, F11 = F11 + F12, F3 = DM(I0, M0), F4 = PM(I8, M8);\n\t"
" F12 = F3 * F4, F11 = F11 + F12, F3 = DM(I0, M0), F4 = PM(I8, M8);\n\t"
" R11 = R11 XOR R11, DM(I1, M0) = F11;\n\t"

 

Each MAC instruction seems to take 2 cycles.

I have checked the addresses in I0 and I8, and they point to different memory blocks as required (so no 1-cycle penalty should be applied).

 

Reading the documentation, to my understanding, the only potential problem remaining might be the conflict between Instruction Fetch and PM Data Fetch. If so, how is it possible to execute a MAC instruction in one cycle?

 

Thanks a lot.

 

C.

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