About the AD9689 eval card, schematic drawing number 9689CE02:
The AD9689 output SERDOUT0+ and SERDOUT0- go to FMC signals DP1_M2C_P and DP1_M2C_N, respectively
The AD9689 output SERDOUT1+ and SERDOUT1- go to FMC signals DP0_M2C_P and DP0_M2C_N, respectively
The other serial JESD lane outputs match up numerically with their corresponding FMC signals.
Is this card actually wired this way (why please?) or is this simply a drawing error?
Rockwell Collins, Inc