I want to know how to bypass all the filters in AD9364 and get a specific sampling frequency (DATA_CLK). I tried by just setting the registers to bypass the filters but the sampling frequency that I got was not the desired one.
You can set all the filters to decimation of 1 (bypass), but this will limit the possible operational rates of the chip since there are minimum PLL rates and maximum rates you can run stages downstream from the ADC. You will have poor ADC performance with a small amount of effective bits in this configuration as well.
As Travis said you can bypass all the filters but at each stage there is a limitation on max data rate, refer below link for max data rate at each stage.
AD936x maximum Rx digital path data rates
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