Is there a consequence if the CONVST conversion start pulse is longer than the maximum spec (500ns)? The I/O interface I'm working with might not be able to generate a pulse that short.
The AD7091-x datasheet were specified at min/max of the CONVST pulse. The CONVST pulse must go high again prior to the EOC which is around 600ns from falling edge of CONVST. We cannot guarantee the performance beyond if CONVST is beyond specification.
If the I/O you are using beyond 500ns, you can choose to enter into power down mode by writing through the configuration register. Please see power down section of the datasheet. The rising edge of the CONVST after power down will start to power up the AD7091 again. The consequence on this mode is it needs time typically 1us to power up.
Thank you jcolao!
Retrieving data ...