Can it be assumed that after a reset, that the first clock to the AD7609 outputs the first bit of the first word (FIRSTDATA is valid). In other words, can reset be asserted often to ensure firstword/firstbit?
As shown in the diagram, page 9 of the AD7609 datasheet, it is recommended to have reset prior convert start (CONVST goes low). The reset ensures that the part is in a known state prior starting conversion. When the conversion is done, the data can be read. Assuming serial interface, on the falling edge of CS clocks out the MSB. The subsequent data is then clockout on the Dout pins on the rising edge of SCLK.
Can I reset prior to every convert to ensure that for every convert the first serial data is first bit first word?
Yes you can apply a valid reset before each convert.
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