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(ADV7611) To enable internal EDID.

Question asked by donadona999s on Nov 1, 2017
Latest reply on Feb 15, 2018 by donadona999s

Hi !

 

I have some questions about ADV7611 EDID.

Our customer are trying to use internal EDID but sometime ADV7611's checksum will fail.

Our customer is writing 0x00 to EDID checksum block.

The correct value is different but we think that ADV7611 will update checksum block automatically.

This is written at hardware users manual.

 

So our customer write 0x00 on purpose to checksum block and check ADV7611 update the value automatically for fail safe(they want to detect ADV7611 is something wrong or not).

But when they connect some source machine to ADV7611 and monitor the DDC line, the checksum value is not correct.

ADV7611 output checksum value which our customer wrote.

Also they tried to retry the EDID sequence and used the reset pin but after reset they read back EDID_A_ENABLE register ,EDID_A_ENABLE is still "1" . (default is "0").

Also I read many thread for ADV7611 EDID in engineer zone and have many thing to confirm.

 

Q1)

To enable EDID, hardware user manual said set EDID_A_ENABLE to "1".

This is the only conditions that ADI's document ask to us.

But I found this thread.

How can I use ADV7611 with an internal EDID 

At this thread, I thought that if our customer want to use EDID, they have to set,

・ 64 77 00 ; Disable the Internal EDID
・ Write EDID RAM.

・ 64 77 00 ; Set the Most Significant Bit of the SPA location to 0

・ 64 52 20 ; Set the SPA for port B.

・ 64 53 00 ; Set the SPA for port B.

・ 64 70 9E ; Set the Least Significant Byte of the SPA location

・ 64 74 03 ; Enable the Internal EDID for Ports

these setup.

So my question is this.

To enable EDID and update checksum result ,is

・ 64 74 03 ; Enable the Internal EDID for Ports

only the trigger to enable EDID and update checksum?

Or do they have to set all register which I wrote above?

 

Q2)

Our customer is using ADV7611.

Not ADV7612.

If they have to set all register which I wrote above, I think this is the correct setting.

・ 64 77 00 ; Disable the Internal EDID
・ Write EDID RAM.

・ 64 77 00 ; Set the Most Significant Bit of the SPA location to 0

・ 64 52 20 ; Set the SPA for port B A ( I think this is typo)

・ 64 53 00 ; Set the SPA for port B.

・ 64 70 9E ; Set the Least Significant Byte of the SPA location

・ 64 74 03 ; Enable the Internal EDID for Ports

・ 64 74 01 ; Enable the Internal EDID for Ports

How do you think about this?

 

Q3)

After they enable EDID using EDID_A_ENABLE and fail to connect HDMI source because of the checksum result, they use reset pin to restart the device.

But after reset, 64 74 is still 01.

After they shutdown the power supply and re-supply the power , register turns to default value.

I thought reset pin will reset this register but I can not check about this at EVAL board because I'm out now.

So my question is this.

Would reset pin resets EDID_A_ENABLE?

 

Q4)

If reset pin don't reset EDID_A_ENABLE, is it safer to set EDID_A_ENABLE default value before our customer write EDID RAM?

 

Our customer have to fix their software very soon so please help about this as soon as possible.

 

Best regards

Kawa

 

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