Hi ADI Team,
1. Tx & Rx Channels to be enabled during calibration?
so Rx and Tx Channels are to be enabled [002 and 003] during changing Tx/Rx Frequency change or Init of RFIC always?
2. PPS support in the AXI ad9361?
i see some pps receiver module, is it being planned for PPS support in the axi ad9361 module as new feature in upcoming release of fmcomms2/3 hdl code.
3. Distributing Tx1 on other ports ?
Do you have any library IP which can distribute differential clock and data.
I have custom board with 2 ADI RFIC slots and petalinux with iio to support one ADI RFIC [slot 1] equivalent to ADI linux,
i want to duplicate the Tx clk, Tx Frame and Tx Data to [No Rx lines] to another ADI RF Slot [slot 2], is there any Readymade Library IP which can duplicate the Txclk [P and N], Txframe [P and N] and Txdata[0:5] [P and N] to output pads. i have dropped an axi spi to control the other RFIC which i can access through spidev and init and all i am left is to duplicate the clk, frame and data lines using clk, frame and data lines from axi_ad9361 block in the fmcomms2 hdl project.