EVAL-ADV7613FEBZ has two LVDS outputs connector, one from SMA(J2~22) and the other P6 & P7 connector.
P6 & P7 LVDS is comes from FPGA out but the data is same as SMA(J2~22)?
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Yes this is correct. The LVDS data at SMAs comes from the output of the ADV7613 which is also the inputs to the FPGA device. The FPGA uses the LVDS inputs to provide a TTL version to the ADV7511, while also providing LVDS output via the connectors referred in your question.
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