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Advanced Sequencer Register

Question asked by teap on Oct 25, 2017
Latest reply on Oct 26, 2017 by Gnib


a question regarding Bit 15 of the Advanced Sequencer Registers 0 & 1 in the ADAS3022.

Data sheet description says:

ASRx Write Enable

0: Update ASRx following ...

1: Enters normal CFG update


What is meant by "Normal CFG Update"? Is Bit 15 in fact a ASR Write Disable (not Enable) bit? Is the ASR register bit 15 bit funtion inverted when compared to bit 15 of the CONFIG register?