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AD5933 controlled by FPGA bit-errors in impedance measurement

Question asked by GregJ_415 on Oct 24, 2017
Latest reply on Oct 25, 2017 by GregJ_415

I am working on designing an Electrical Impedance Spectroscopy platform using the AD5933 device. My data I am getting seems to have bit-errors, and I wanted to verify whether or not my command sequence is correct before I start to debug rest of the signal chain.

 

When I take single data at a time (no repeat freq command) I do not seem to see any bit error...

 

My question is this:

when I issue a "repeat freq command" to the cntrl register by writing 0x40 to addr 0x80, do I then have to de-assert the "repeat freq command"  bit? 

 

In other words, do I need to follow these steps: 

   1) write 0x40 to addr 0x80 (repeat freq command)

   2) write 0x00 to addr 0x80 (de-assert repeat command)

   3) pole status reg until data ready

or is step 2) unnecessary?

 

Second question: 

 

when polling status register for valid real/Imag data, do I only need to check the second bit? Or do I need to make sure that all 4 bits have the configuration 0010?

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