Below are the materials Maxim suggested.

The input impedance of MAX30003 is very large, but how to keep the high input impedance for the system when we use dry electrodes?

Using dry electrodes does not lower the input impedance of the IC (shown in the Electrical Characteristics Table and Typical Operating Characteristics). To maintain the highest input impedance, you should follow these steps: Do not add an external EMI filter. Use the third electrode body bias (VCM) feature instead of the internal lead bias resistors.

Does Maxim have any devices that implement the Pan-Tompkins algorithm?

The MAX30003 has a built-in algorithm, that is based on the Pan-Tompkins algorithm. Used for detecting the R-to-R peak intervals, this algorithm is hard-coded into the device rather than requiring this to run on the host MCU.

What is the exact pin description in the MAX30003 datasheet for I.C. (internally connected) pins?

The MAX30003 datasheet Pin Description on page 13 states that the I.C. pins (internally connected pins) should be connected to AGND, however these pins should be left floating instead (datasheet will be revised soon, 7/18/2019).

What is the ECG noise histogram, and how can I read it?

This is a common way of displaying channel noise in an analog system with a digitizing ADC. In this case, we short the two analog channel inputs (ECGP and ECGN) together and to VCM or letting each channel go to VMID using the input mux resources. In both cases, the two inputs are both held to a middle voltage within the linear input range of the input instrumentation amplifier – either both at VCM at 0.65V relative to GND or at VMID at 0.84V relative to GND when AVDD=1.8V. Then, several thousand measurements are taken with the ADC, and the raw ADC results are displayed in the histogram. The number of occurrences of each code is displayed on the Y-axis. Ideally, the digitized code result histogram should be centered around 0. Instead, it is centered around -46 LSBs. So, there is an offset from zero. We are using an 18bit DAC, so there is one bit for polarity and 2^17 magnitude codes on each side. You can calculate the offset from the following formula: ECG Reading (V) = (VREF×[18 bit ADC code]) / (2^17 × ECG Gain Setting) Where VREF = 1V , ECG Gain Setting is programmable to 20, 40, 80, or 160 V/V . The 18-bit ADC code is in two’s complement format so the right polarity needs to be considered when converting to decimal. ECG Reading of -46 in Volts = (1V * (-46)) /((131072) * 20) = -17.548uV ECG Reading of -47 in Voltage = (1V * (-47)) /((131072) * 20) = -17.929uV The offset of the distribution below is currently somewhere between code -46 and code -47. So, 100% of the 20V/V gain measurements of the ECG channel came in on codes -50, -49, -48, -47, -46, -45, -44, -42 and -41. Over half of the samples were digitized to either code -46 or code -47.

Why is the measured high pass filter corner frequency on the MAX30003 greater than expected?

The corner frequency of the high pass filter for MAX30003 is given by Fhp = 1/(2 x pi x Rhpf x Chpf), where Rhpf is an internal resistance (typ value = 450kohm), and Chpf is the external capacitance connected between CAPP and CAPN. So with a 1.47uF (1uF + 0.47uF) capacitance between CAPP and CAPN, the expected high pass filter corner frequency is 0.24Hz. However, with specific 1uF and 0.47uF capacitors, the actual measured high pass filter corner frequency was found to be 0.5Hz. This happens because the effective value of the capacitance between CAPP and CAPN is smaller than the nominal value because of dc and ac derating. The ac and dc voltage of the input ECG signal directly appear across CAPP and CAPN, and must be accounted for when determining the HPF corner frequency. For example with a 1uF (nominal) cap with manufacturer part number CL03A105MQ3CSN, the ac and dc derating curves look as follows: Note that even if there is no dc bias in the input signal, since the ac signal amplitude of an ecg signal is very small, the effective capacitance value could be smaller than the nominal capacitance by 40%.

How can we determine the resistance between ECGP and ECGN at which the MAX30003 will detect a DC Leads Off condition ?

The internal circuitry related to DC leads off check (except the resistor Rpatient , which is external) is shown in the figure below. A DC Leads off condition is detected when the outputs of Comparators Comp1 and Comp2 go High, i.e. the Rpatient value is large enough that ECGP > VTHH , and ECGN < VTHL. The Rpatient value above which a DC Leads OFF condtion is detected can be calculated as : Rpatient = ( VTHH - VTHL ) / ( IMAG - 0.5*(VTHH - VTHL)/RBIAS ) The values for VTHH, VTHL, IMAG and RBIAS can be selected through configuration registers described in the datasheet.

Do the MAX30003 FCLK and SCLK pins have internal ESD diodes between these pins and any of the VDD pins?

No, the MAX30003 FCLK and SCLK do not have internal ESD diodes connected to any of the VDD pins.

For the MAX30003, what amplitude of the ECG signal will cause clipping ?

With gain settings of 20, 40, 80, 160V/V, an input amplitude of more than +/-50 mV, +/-25 mV, +/- 12.5 mV, +/-6.25mV respectively will cause ADC clipping. The +/-32.5mV limit specified in the datasheet, is where the THD is less than 0.3% as listed in the EC Table Conditions column. With a gain of 20V/V the input can go higher than +/-32.5mV and up to +/-50mV without ADC clipping but the distortion may be higher than 0.3%. With gains of 40V/V and higher the THD condition is not the limiting factor because the ADC will clip before the THD condition.

In the MAX30003, what is the equation to convert the ADC code to the ECG reading in volts?

The equation to convert the ADC code to the ECG reading is: ECG Reading (V) = (VREF×[18 bit ADC code]) / (2^17×Gain Setting) Where VREF = 1V and Gain Setting is programmable to 20, 40, 80, or 160 V/V . The 18-bit ADC code is two’s complement so the right polarity needs to be considered. The ADC is really a bipolar input so the full scale range is +/-1V or 2Vpp but the equation above is single sided.

Is there any layout guide for the MAX30003?

When laying out a board containing a MAX30003, the critical items to place and route first are: Analog components: Vref, CPLL, VBG, CAPP/N, VCM VDD bypass caps ECG Filters: These all need to be placed as physically close to the MAX30003 part as possible . All other components should not interfere with the goal of getting these as close as possible, as those are sensitive lines. They should not run out to any test point, as that will act as an antennae as well, and we want to keep the analog lines as clean as possible. Please remove any unnecessary test points, open footprints, etc.

Is any power sequencing required for the MAX30003?

No, there is no special sequencing required as long as AVDD and DVDD are powered at the same time, as the absolute maximum ratings require these two be within +/-0.3V of each other at all times. OVDD can be powered separately as long as SPI communications aren't initiated before it is fully powered up.

Are INTB and INT2B open-drain in the MAX30003?

INTB and INT2B can be configured as open-drain, open-drain with internal pullup resistor, CMOS driver, or disabled (tri-state) by writing bits INTB_TYPE[1:0] in registers 0x02 and 0x03. The default value corresponds with an Open-Drain nMOS Driver with 125kΩ Internal Pullup Resistance.

The MAXREFDES100 schematic is different from that in the MAX30003 data sheet. Which one should I refer to?

Please refer to the MAX30003 data sheet. The MAXREFDES100 design is compatible with other ECG ICs. If you are using the MAX30003, then refer to the circuit in the MAX30003 data sheet.

What is the main difference between the MAX30003 and the MAX30004?

The main difference is that the MAX30004 only provides R-R measurement, while the MAX30003 also provides the ECG signal. Both devices perform R-R detection, but the ECG waveform samples are only available with the MAX30003.

How much ECG performance do I get when connecting a third electrode to VCM?

Customers should consider using VCM as a third electrode when using the MAX30001, MAX30002, or MAX30004. This third electrode tied to VCM (instead of being bypassed to ground) will help increase ECG performance. Using a third electrode connected to VCM helps in these ways: It won’t lower the electrode to skin impedance which is higher with dry electrodes. It will help with electrode impedance mismatch because when using the third electrode connected to VCM, the lead bias resistors internal to the part can be turned off, and this will keep the input impedance to the part high. Higher impedance will reduce the common mode to differential conversion (by keeping CMRR high) if there is a mismatch in the impedance of the two electrodes connected to ECGP and ECGN. Using VCM can also help with 50 or 60 Hz line noise by attenuating the capacitive coupling between the body and our part. The performance difference is night and day. A two-electrode solution will not work with dry electrodes, as arm hair, low perspiration (reduces contact impedance), half-cell voltages, contact impedance mismatches, etc..all make it extremely difficult to give a generalized number. To keep it simple, we advise using three electrodes to every customer whose application is wrist-based using dry electrodes. The MAX3000x parts are technically made for use in a hospital environment (read: wet electrodes ), although they can work very well with dry electrodes, but that requires the third electrode for the same reasons mentioned above. Reference schematic : Simply connect VCM to the third electrode. No filters or caps are needed. Please see below figure or attached picture (manually edited application circuit, that has been edited from the MAX30003 Datasheet). The ECGP vs ECGN polarization doesn’t matter, as it can be inverted easily based on right or left hand. Engineers traditionally put VCM and ECGN on the Bottom ( touching wrist ) and connect ECGP on top ( finger ).

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Documents MAX30003CTI+T: FAQ

MAX30003CTI+T: FAQ

Q: Do the MAX30003 FCLK and SCLK pins have internal ESD diodes between these pins and any of the VDD pins?

No, the MAX30003 FCLK and SCLK do not have internal ESD diodes connected to any of the VDD pins.

Q: For the MAX30003, what amplitude of the ECG signal will cause clipping ?

With gain settings of 20, 40, 80, 160V/V, an input amplitude of more than +/-50 mV, +/-25 mV, +/- 12.5 mV, +/-6.25mV respectively will cause ADC clipping. The +/-32.5mV limit specified in the datasheet, is where the THD is less than 0.3% as listed in the EC Table Conditions column. With a gain of 20V/V the input can go higher than +/-32.5mV and up to +/-50mV without ADC clipping but the distortion may be higher than 0.3%. With gains of 40V/V and higher the THD condition is not the limiting factor because the ADC will clip before the THD condition.

Q: In the MAX30003, what is the equation to convert the ADC code to the ECG reading in volts?

The equation to convert the ADC code to the ECG reading is: ECG Reading (V) = (VREF×[18 bit ADC code]) / (2^17×Gain Setting) Where VREF = 1V and Gain Setting is programmable to 20, 40, 80, or 160 V/V . The 18-bit ADC code is two’s complement so the right polarity needs to be considered. The ADC is really a bipolar input so the full scale range is +/-1V or 2Vpp but the equation above is single sided.