For SPI Masters that are 8, 16, or 24-bit oriented you will have to manually toggle the CS signal using a non-SPI GPIO. For write modes, if the CS pin is toggled high for tCSA before 32 SCLK edges are realized then the previously clocked data is ignored. Any extra data after the 32nd SCLK edge is also ignored. For read modes, data will begin to be clocked out on the 9th SCLK rising edge.
Additionally, the MAX30003 is only compatible with SPI Mode 0 and Mode 3.
