When reading a certain LSB inputs, we are seeing the data valid bit clearing for other inputs.
For example, we have set 0x08 to single shot and trigger a read of all the inputs by writing 0xff to register 0x01.
Before reading any of the inputs we read register 0x00 (status low) which outputs 0xFF indicating that all the registers contain new data.
Afterwards we read register 0x0B (LSB for V1) which outputs its voltage LSB value.
However, when we read the status register again (0x00), it outputs 0xfc (11111100) which indicates that both v1 and v2 have old data.
During testing this issue happens with all LSB affecting its preceding input (ie. v2 LSB clears v3 data_valid flag).
We tried setting all inputs as single ended but still see the same result. Testing the I2C signals on an oscilloscope confirms that the read/write packets as the same as read through console. Our I2C CLK freq is less than 400Khz.
Is there some other setting we are missing? This happens across multiple boards.
[edited by: LouisWeride at 10:15 PM (GMT -4) on 27 Oct 2022]