Q1. Can you explain the Fault detection function to me and how it may offer benefits to my system?
A1. The voltages on the source inputs of the ADG5412F are continuously monitored and the state of the switch is indicated by an active low digital output pin, FF. A HI signal (3V) indicates “no fault” condition and an LO signal (<0.8V) indicates an overvoltage has occurred on any of the four inputs.
For systems that are sensitive during a start-up sequence, the active low operation of the flag allows the system to ensure that the ADG5412F is powered on and that all input voltages are within normal operating range before initiating operation. The FF pin introduces a means to diagnose systems in fault programmatically and can be used to stop long or expensive tests if a fault occurs.
It offers more intelligence to the system, preventing differential signals that over-voltage on both channels presenting as “normal” operation.
The FF pin is a weak pull-up (2.5uA) which allows the signals to be combined into a single interrupt for larger modules that contain multiple devices. It does not require an external pull-up resistor, but using a 1k ohms pull-up resistor to 5V (maximum) improves the recovery time, tDIGREC of the FF pin.
Q2. Can you explain Power-Off protection and its benefits?
A2. The ADG5412F will provide protection to downstream circuitry against over-voltage conditions when it’s unpowered.
This is very important for modules that may be unpowered but have signals present on the inputs. Power-off protection to down-stream circuitry cannot be guaranteed using discrete protection components.
The ADG5412F Power Off protection guarantees the channel will remain in the OFF state and will Standoff up to ±55V ie no signal will get passed to the output protecting downstream components. On the ADG5412F, the supplies can be GNDed or Floating but GND must be present on the GND pin for the Power-Off function to work. If the supplies are GNDed during Power-Off you will get ~10nA of leakage on the output and if the supplies are floating the leakage peaks to10uA and levels out to ~300nA on the output, Dx.
Q3. The ADG5412F/ADG5413F offers ±55V over-voltage protection. What are the keys things I need to understand about this Over-voltage protected switch compared to using a standard switch in my application?
A3. The ADG5412F/ADG5413F are ideally suited as protective elements in signal chains that are sensitive to both channel impedance and overvoltage signals. During normal operation the ADG5412F behaves like a standard switch and can pass rail-rail signals. The ADG5412F offers 10? On resistance with excellent flatness ensuring minimum distortion in the system (THD+N = -100dB).
The ADG5412F offers ±55V protection on the inputs with respect to GND. When the voltages on the Sx inputs exceed either rail by ~0.7V the switch will turn off and present high impedance to the input. (See Q4 for state of output during a fault). ±55V is the maximum voltage allowed on the Sx inputs on the ADG5412F and exceeding this limit may damage the ESD protection on the part.
One other point to note, 80V is the maximum voltage that can be present across the OFF switch, (Sx to Dx = 80V) and 80V is the maximum voltage that can be present from the Sx inputs to the supplies, (Sx to VDD or VSS = 80V).
Therefore, if you are using the part with 40V Single Supply the maximum voltage allowed on Sx is -40V and not -55V.
If you are switching signals with a bandwidth of 3MHz or greater, please reference the datasheet to understand the relationship between signal amplitude and bandwidth to ensure signal integrity.
Q4. What happens to the output during an over-voltage event?
A4. The default state is that the output, Dx goes high impedance. (ADG5412F/ADG5413F)
If the part (ie ADG5404F, ADG5436F, ADG5462F) has a DR pin (Drain Response) the user can select how the output behaves during an Over-voltage event. If the DR pin is left floating or pulled high, the drain will remain high impedance and float. The voltage dissipates through the load and the voltage on the output, VD drops to 0V.
If the DR pin is pulled low, then the drain will pull to the rail that was exceeded.
If the part (ADG5462F) has a POSFV and NEGFV pin, and these are set as the clamp voltages, the part will turn-off when the voltages on inputs exceed POSFV/NEGFV by 0.7V and the drain will pull to the rail (POSFV or NEGFV) that was exceeded.
Q5. Can these parts be powered off 5V single supply?
A5. No. Guaranteed minimum operation is 8V Single Supply as per datasheet.
Q6. My downstream component states that the inputs cannot exceed Vdd+0.3V, but the ADG5412F only turns off when the voltages on input exceeds Vdd by ~0.7V. Will this cause an issue in my system?
A6. No. The output of our ADG54xxF parts clamps the OVP to Vdd+0.7V for ~460ns (Overvoltage Response Time, tRESPONSE ), after which time the part has fully turned OFF and output goes open circuit or pulls to Vdd, depending on part. So for ~460ns period, there will be some current flow but it would be more benign than a 1kV HBM ESD pulse, so this should not cause any issues in the system once the downstream circuit has an ESD rating in excess of 500V HBM. Clamping the signals too close to the rails could trigger false Over-voltages if there is ripple on the power supplies so the 0.7V Vt is good balance for the system.
Q7. What will be the recovery time when switching from a channel in fault to a channel not in fault?
A7. The timing will be the same as normal channel to channel switching; i.e. there is no additional timing to change from a fault channel to a non-fault channel: typically 400ns for Ton on the ADG5404F
Q8. How does an overvoltage on one mux channel affect the operation of the other channels of the ADG5404F multiplexer?
A8. One of the major drawbacks of using series resistors to protect multiplexed inputs is that an over-voltage event on OFF channels injects noise to good ON channel due to current flow in substrate leading to corrupt data. With ADG54xxF parts, there is no current flow in the substrate ensuring no corruption of data.
However, there will be an increase in the leakage current on the mux output due to a Fault condition.
For the ADG5404F, the Drain leakage, ID, for one channel in fault and the other three not is typically 1.2nA @25°C. So this ID fault leakage will add to the leakage specification of a normally ON channel, ID(ON), which is 0.6nA typically.
IDD will also increase slightly during an over-voltage event, on the ADG5404F from typically 0.9mA to 1.2mA for a +55V fault
Q9. What are the key performance differences between the ADG5412F and the ADG5412BF?
A9. The ADG5412F offers protection on the Sx inputs only. The ADG5412BF offers protection on the Sx inputs and the Dx inputs so is needed in applications that require fault protection on both inputs and outputs.
Unlike the ADG5412F, the ADG5412BF does not have ESD clamp diodes on the output side, so during an OVP event, until the part turn-off after it detects a fault (450ns typ) the output will track the input.
Some examples of applications that may require bi-directional OVP are, in ATE systems where faults can occur from Test equipment side or on DUT side of switch or in Switch Matrix Modules where any pin can be an input or an output.
Q10. Are these parts pin-pin compatible with existing parts? For example is the ADG5404F pin-pin compatible with the ADG5404?
A10. The “F” parts are not direct pin-pin replacements with non-F version. The ADG5404F has extra pins (ie the FF, SF and DR pins) that are NC (no connects) on the ADG5404. If these pins are true No Connects on the board then the ADG5404F can be dropped in as a replacement. However, if the NC pins on the ADG5404 have been hard-wired to VDD/VSS then the part cannot be used as a direct drop-in.
The FF and SF pins on the ADG5404F are digital output pins and are weak pull-ups (2.5uA if not in use, these pins should be left floating. If they are grounded 2.5uA will flow from FF to GND but will not damage the part.