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ADG601: Digital input from a FET
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1. Thermal Resistance Junction to Board (Theta JB): 2. Thermal Resistance Junction to Case (Theta JC):
3.3V VL logic supply for ADG2128
AD8152: Connection of DC inputs
AD8152: used as a DVI switch
AD8152_switch HDMI signals
AD8156: Can I drive AD8156 from LVDS and LVCMOS sources?
AD8156: multiplexer and OOB feature
ADG1204: Connecting the exposed paddle to Vss
ADG1204: Optimal impedance level
ADG1204: What is the optimal impedance level for source and load to apply?
ADG1219: Spice modell to simulate the charge injection?
ADG1219: Supply voltage
ADG1236: Charge injection
ADG1409: ADG1409: Process technology / MTBF
ADG1434: IBIS model
ADG1604 DC "Off resistance"
ADG1612: Minimum supply voltage
ADG2128 Output stage ( Hi, Lo, Hi Z) of the I/O when the switch is off
ADG3248: number of logic gates transistors used
ADG3300: Can I work with VCCA = VCCY?
ADG3304: Is this device compatible with I2C?
ADG3304: used as I2C level shifter
ADG3304_power up sequence
ADG3308 and indeterminate i/p o/p state's interface query
ADG3308 bidirectional, setting the direction
ADG3308: Design queries
ADG330x unused inputs
ADG330x: devices is heating up - what is the reason
ADG333A switching frequency / bandwidth information?
ADG406: Unpowered usage
ADG409: Minimum power supply
ADG411: is ist possible to worf with a 3V Logic Level?
ADG411: logic threshold voltage over digital supply.
ADG412: Lower voltage supplies than specified
ADG419: supply voltage
ADG426_leakage data at 60C
ADG428: Descrepancy between maximum operating temperature in selection tool and web page order guide
ADG438F: Bidirectional or unidirectional
ADG442: low logic level clamped to about -1V.
ADG451: Latch up
ADG451BR: Spectral Noise Density
ADG452: GND connections
ADG452: VL = 15V possible not not recommendable
ADG453: Perfomance from +/- 15 V power supply
ADG453: Power Up Sequence
ADG467: Fault free input range
ADG506: Overvoltage on the input
ADG506: Pin connection
ADG508 ADG509_digital control voltage range
ADG508A: Enquiry for product specification
ADG508_thetaJC and maximumTJ
ADG5208: THD specifications missing at the ADG520x family
ADG5404, ADG1406, ADG442: case temperature:
ADG5436_unbalance power supply
ADG54xx Latch-up immune switches and multiplexers FAQ
ADG601: Digital input from a FET
ADG621_spec for 3.3v supply
ADG623: ESD Lavel for the AGD623
ADG659: Supply voltage
ADG706: +/- 5V supplies
ADG706: Working as a demultiplexer
ADG708: Multiplexing 3V3 logic signals
ADG709: Life time
ADG712: overvoltage protection
ADG715 Operation with VDD=VSS=0V
ADG728: Input and output current for safe operation
ADG732 LFCSP exposed Pad
ADG733: Noise specification
ADG734 in audio application
ADG734: Usage without supplies
ADG788: ESD rating
ADG788: How much ESD can the ADG788 take?
ADG801_parallel multiple switch to reduce Ron
ADG804: Maximum voltage
ADG819BRM's branding is "SBC" although in the datasheet states "SNB".
ADG884: Bandwidth simulation
ADG901: Max current
ADG936_About the insertion loss between DC to 50MHz
ADN4600 Design Support Files
ADN4604 Design Support Files
ADN4605 Design Support Files
ADN4612 Design Support Files
ADV3200_3201 Design Support Files
ADV3202_3203 Design Support Files
ADV3224_3225 Design Support Files
ADV3226_ADV3227 Design Support Files
ADV3228_3229 Design Support Files
Are Latch-up immune parts over-voltage fault protected?
Are these parts pin-pin compatible with existing parts?
Break Before Making Switch Timing Measurement
Can I leave the exposed pad floating?
Can other channels really continue to operate as normal when another channel is in fault?
Can the ADG333 be powered from a single 24V supply?
Can the ADG452 be powered from a single 24V supply and 3.3V digital supply?
Can you explain Power-Off protection and its benefits?
confusing redundant temperature spec info in datasheet
Cross talk when using ADG490 to mux thermocoules
Datasheet for SW01,SW02,SW03,SW04
Do you specify switch Off Resistance?
EVAL-ADG2128EBZ: What type of cable can I use to connect the board to my signal generator?
FAQ: Digital Crosspoint Switch Frequently Asked Questions
FIT reliablity data
General Switch/Mux FAQ
How do CMOS switch logic control voltage levels affect Idd?
How do the fault diagnostics work?
How should I manage unused or Not Connected pins?
I like the robustness of these parts to PSS issues and the good ESD performance but my application needs lower capacitance and good leakage performance.
Is it okay to connect the ADG1611BRUZ's and ADG1436YCPZ's Exposed Pad to Gnd?
Latch-up and how are these parts immune to it?
Maximum Pass Voltage on the ADG324x bus switches
MEMS Switch Technology FAQ's
Multiplexer Settling Time
Multiplexor and switch noise specifications
Power Supply sequencing requirements for ADG451, ADG452, ADG453
Radiation hardened/Space qualified parts
Replacement for ADG201ATQ
SPICE model not working with Altium Designer
Stencil opening for AD8158ACPZ
SW06: State of the switch when unpowered
Switch & Multiplexer Leakage Measurement Reduction Tutorial
Switches and Multiplexes Support Community
The ADG5248F offers �55V over-voltage protection. What are the keys things I need to understand about this Over-voltage protected switch compared to using a standard switch in my application
These parts are good, but I need lower on resistance at �15V. Do you have any compatible parts?
Theta JA(Junction to Ambient Temperature) and Theta JC (Junction to case Temperature)
What are suitable applications for these parts?
What are the key benefits of these fault protected switches?
What are the system benefits of fault diagnostics?
What are the system benefits of overvoltage fault protection with secondary supplies?
What happens to the output during an over-voltage event?
What if I need to protect my device or downstream circuits against over-voltages?
What is the ESD rating of these devices and what is the benefit of the rating?
What is the minimum voltage that can be used with these parts?
What is the recommended supply sequence?
What is the role of the Control Echo Enable bit?
What will be the recovery time when switching from a channel in fault to a channel not in fault?
ADG601: Digital input from a FET
I'm intending to use the ADG601 switch in a new design. The switch will be
powered from +/-5V supply rails ie. Vdd=+5,Vss=-5V. I ideally wish to drive the
ADG601 digital input from a FET (drain) and was intending to use a high value
pullup resistor to Vdd at the FET drain. Do you see any issue in doing this?
I'm not concerned about switching speed.
I assume that what you want to do is to set the HIGH logic for the control
input using a high value pull-up while the LOW logic will be set using the FET
which will pull the control input to GND. If that is the case, I don't see any
problem, but you should be aware that having an excessively high pull-up could
make the control input of the switch more susceptible to pick-up noise as with
any CMOS logic device.
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