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ADG1434 Backfeed to Vdd when powered off

b8a2a87b686df095b4eb3519363b4173.html0118.b8a2a87b686df095b4eb3519363b4173.htmlI am using the ADG1434 biased at +15V for Vdd, -15V for Vss. This switch is being used to multiplex RS-232 data (+/-12V single ended).

The switch works great when it's powered on, but I am having a problem with it when powered OFF.

Here's the scenario:  Vdd = 0V, Vss = 0V and all other pins equal 0V, but there is an external signal being driven into one of the switch inputs (S3B in this case) at 12V. This 12V is being back fed to Vdd (Vdd now = 12V), which goes to several other parts, including 20 other ADG1434 switches. In some cases this voltage is going through Vdd of the other parts and is getting out on S2B and S1B, but this case is never consistent.

Any advice on how to keep this from happening?

See attached for further detail.



  • Hi Jeff,

    With Vdd = 0V, Vss = 0V and a 12V signal on an analog input the Absolute Maximum Ratings of the device are exceeded and this is not recommended. The analog inputs should not exceed 0.3V beyond the supplies or 30mA, whichever occurs first.

    The source, drain, and logic terminals include clamping diodes to the supplies to provide ESD protection. Reverse-biased in normal operation, the diodes do not pass current unless the signal exceeds the supply voltage.


    If loss of power causes the supplies to float, the input signals can power the part through the internal diodes. As a result, the switch—and possibly any other components running from its V


    DD supply—may be powered up.

    To prevent the Vdd line from powering up through the analog inputs, blocking diodes can be placed in series with the supplies as per the diagram below.

    Under these conditions the part may still power up and signals on the analog inputs may pass through the switch to down stream circuitry. The analog signal range is reduced due to the voltage drop of the blocking diodes on the supplies.


    The Absolute Maximum Ratings are still exceeded so normal operation cannot be guaranteed but this is one method of ensuring the Vdd line does not power up.





  • Thanks, Michael.

    That diagram you showed was what I was thinking the the internal parts on the switch looked like based on my testing. Where did you get it, because it is not in the datasheet? App note? Just curious.

    We discussed this approach yesterday and will probably use it to rework the board that we already have. I'll let you know the results of the tests after I have implemented it.

    I don't want to violate maximum ratings of the part long term, so could you (or anyone else) recommend a switch that can tolerate this? I'll keep looking in the mean time and let you know what I find.

    Again, thanks for your help!


  • Hi Jeff,

    Please see the article attached for more information on fault conditions:



  • Good article, thanks for sending it. My questions have been answered.