ADG725/ADG731 programming

Question

Hello, 
 I'm using several ADG731 and 725 in a design (at least 5 total). Right now the design is not finalized but I was wondering about programming the chip since table I and II are actually contradictory: the first line claims that the switch state will not change whenever CSb/CSAb/CSBb are high, but the 
 second one that all switches will be off whenever ENb is high. 
 This must be some documentation error! 
 Right now my question is, which of CSb and ENb has priority over the other?

ADIApproved · Accepted Answer

Hello GabrielIP, 
 If all 3 (/EN, /CSA and /CSB) are high, all switches are turned off and the switch registers are not changed. 
 Example: 
 Input1 = [ A3| A2 | A1 | A0 | /EN | /CSA | /CSB] = [0|1|0|0|0|0|0] = S5A – DA, S5B – DB 
 Output1 = S5A – DA, S5B – DB 
 Input2 = [0|0|1|0|1|1|1] = S3A – DA, S3B – DB, and "All switches off" and "Retain Previous Switch condition" for both A and B 
 Output2 = None, All switches off 
 Input3 = [1|0|0|0|0|1|1] = S9A – DA, S9B – DB, and "Retain Previous Switch condition" for both A and B 
 Output3 = S5A – DA, S5B – DB 
 Input4 = [1|0|0|0|0|0|1] = S9A – DA, S9B – DB, and "Retain Previous Switch condition" for B 
 Output4 = S9A – DA, S5B – DB 
 In the above example, all the switches are off when /EN is high. The required state of the switch can only be written to if the /CSA and /CSB bits are low. The switch registers were written to twice with different conditions with Input2 and 3, but they retained their condition from Input1. The B output did not change with any input other than Input1. 
 Regards, 
 Sean)

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ADG725/ADG731 programming