I am planning to use AD9122 DAC outputs with 0.5V bias as inputs to ADG936 (at A and B inputs), for DC-100MHz signals. I want to make sure that the 0.5V dc bias on the DAC signal is available and not blocked (except for insertion loss at DC) at the RFC outputs of the ADG936. I will need this bias level to drive the ADL5375 IQ modulator.