Analog MUX - Absolute max I/O differential with enable off

Hi, I am an EE working on a battery monitoring system for the Electric Motorcycle Project at an undergraduate college and was looking at the 8 channel differential analog multiplexers (ADG1407, ADG507A, ADG509A, ADG5207). Could anyone tell me the max VDS for the internal transistors in the devices (when the enable line is down). We were considering designing a system which would temporarily disable (Enable input off) the analog multiplexers so that we could run a voltage on the same line as the multiplexer outputs that would be 90V different from the inputs. We were guessing that your switches wouldn't be able to handle that, and that we would have to add a MOSFET with a higher VDS on the output (switching to enable/disable) to prevent internal MOSFET breakdowns. Is this correct?

  • Hello mb1460,

    The maximum these devices can tolerate is process dependent and is equivalent to the Absolute Maximum Ratings given for "VDD to VSS". The devices you mentioned will not be able to withstand a 90V differential across the switch.

    Also, bear in mind that the voltage at the analog pins (D or Sx) should not exceed the supply rails at any time. This is also covered in the Absolute Maximum Ratings.

    Regards,


    Sean