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Power-up/down Sequence Timing in Digital Potentiometers and Analog Switches

Thread Summary

The user is concerned about the power-up and power-down sequence for multiple Analog Devices components (AD5260, AD5290, ADG1211, ADG1212, ADG1414) to ensure long-term reliability. The final answer confirms the importance of following the golden sequence: GND, Vdd/Vss, digital inputs, and analog inputs/potentiometer terminals, emphasizing that analog inputs should not exceed supply voltages during these sequences. The user notes that AD5260 and ADG1414 have VL inputs and will manage capacitive charge/discharge intervals to avoid exceeding absolute maximum ratings.
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Hello.

I'm working on a project that includes dozens of the following devices: AD5260, AD5290, ADG1211, ADG1212, ADG1414.

I understand from their respective datasheets that voltage rails should be powered in a specific order: GND, Vdd/Vss, digital inputs and finally analog inputs/potentiometer terminals; power-down should be performed the other way around.

What is not so clear is how much time it is safe to have one rail powered before powering-up/down the next one, and if specific voltage levels should be reached on one rail before proceeding with the other rails.

Since so many devices are involved, and main power loss is a certain possibility (then relying on power source hold-up times to power down everything the safest way possible), I should time things very carefully, in particular on the power down sequence.

Also, there will be a considerable capacitive load involved, so it is important to know if power down of specific rails should be rushed in some way (activate dummy load or similar) in order to achieve the right timings during the sequence.

I would really appreciate your help in order to have the most specific information possible.

Thanks in advance to everyone.

  • Hello dffdff,

    All Analog devices are tested for PSS issues. The order you describe is know as the golden routine for powering up devices.

    The switches in your system have no VL pins and are typically robust to supply rails being applied in any order.

    However, it is more important to ensure that the analog inputs do not exceed the supply voltages; this includes during power-up or power-down sequences. This is valid for both the switches and potentiometers.

    Regards,

    Sean

  • Actually AD5260 and ADG1414 do have a VL input.

    Besides, if I read the datasheets correctly, the ESD protection diodes could be forward biased if I supply any voltage higher than the conduction value of such diodes in the wrong order.

    Also, even if they're typically robust enough, it's long term reliability what concerns me.

    That's why I want to make sure all power rails are disabled and drained out of charge in the right order, and I wanted to know if taking too much time to do this would cause any issues in the long run.

    I guess this would be not be a concern on devices without VL pins, so AD5290 and ADG1211/12 would be out of the question.

    Regards,

    Juan

  • Hello Juan,

    We cannot guarantee the reliability or lifetime of our devices if they are operated beyond the Absolute Maximum Ratings given in their respective data sheets.

    If you are concerned about the power down sequence and are able to manage the order in which this happens, then you should follow the golden sequence to ensure proper power down operation.

    Regards,


    Sean

  • Alright, I'll stick to that rule, while trying to predict or monitor capacitive charge/discharge intervals, so at no time the maximum ratings are exceeded.

    As about the time it takes to turn on/off the power rails, I guess I must assume it is not relevant, since it is not specified in the ratings, right?

    I will, however, try to make those times as short as possible while respecting the right sequence, and I suppose I should have no issues.

    Thanks a lot for your time.

    Juan